This invention relates generally to a voltage regulation circuit for use with integrated circuits and more particularly to a low voltage regulation circuit intened to reduce the power consumption and current of an integrated circuit. In earlier low voltage regulation circuits, the sum of the threshold voltage VTP of a P channel transistor and the threshold voltage VTN of a N channel transistor, that is, a voltage having a value of VTP+VTN is provided. The voltage is controlled by a comparator in order to make the supply voltage of circuits operating with high frequency, for example, an oscillation circuit, flip-flops, equal with the magnitude VTP+VTN. However, such a circuit has a disadvantage in that a large pattern area is required in the integrated circuit because of the standard voltage circuit (VTP+VTN), the comparator, a capacitor for preventing oscillation of the comparator, and the like. The large surface area required for the standardized voltage circuit is very disadvantageous in view of a purpose of reducing voltage, that is, to reduce the size of the integrated circuit chips. Additionally, the large pattern area increases the cost of manufacture.
What is needed is a low voltage regulation circuit which is simplified in construction and requires a reduced pattern area in the integrated circuit.